Verification Engineer

Role Summary
A mid to senior-level Verification Engineer responsible for developing and executing verification plans for complex ASIC and SoC designs. This role involves designing and implementing verification environments, debugging simulations, and ensuring functional coverage. The position requires a proactive approach to problem-solving and collaboration within cross-functional teams to validate hardware components effectively.

Responsibilities

• Develop and implement UVM testbenches and verification scenarios for datapath and control functions.
• Identify coverage gaps and enhance functional verification efforts to address coverage deficiencies.
• Debug simulation failures and adapt verification strategies to incorporate new technologies.
• Collaborate with design and validation teams to improve verification methodologies and processes.
• Automate verification tasks using scripting languages such as Python, Perl, or TCL.
• Develop and verify firmware/C-Coding for CPU sub-systems, including firmware validation.
• Design and validate FPGA-based prototypes and verification setups.
• Apply ASIC verification methodologies such as UVM and SystemVerilog to ensure comprehensive coverage.
• Review RTL digital designs and ensure adherence to design-for-test (DFT) principles.
• Maintain familiarity with Linux-based development environments and tools.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related field; master’s preferred.
• 3-5 years of experience in hardware verification, preferably ASIC/SoC environments.
• Strong knowledge of hardware description languages (HDLs) such as Verilog/SystemVerilog.
• Experience with RTL design and simulation tools from Synopsys, Cadence, or Mentor Graphics.
• Proficiency in scripting languages including Python, Perl, or TCL for automation.
• Familiarity with ASIC/SoC design flow and verification methodologies like UVM.
• Practical experience in debugging simulations and working independently on verification tasks.
• Knowledge of protocols such as SPI and I2C.
• Experience with firmware development and verification of CPU subsystems is advantageous.
• Good communication, organizational, and teamwork skills.

Publishing Pay Range: $58.00 – $60.00 Hourly

This position offers a hybrid schedule, with time split between the office and remote work.